As semiconductor processes enter the deep sub-micron era, the continuous increase in chip integration density poses significant challenges to device reliability. Against this backdrop, enhancing the fault tolerance of network-on-chip (NoC) has become critical to ensuring system reliability in the face of inevitable manufacturing defects and environmental factors that cause system failures. Therefore, this study proposes HOFT, a fault-tolerant routing algorithm based on minimal routing path diversity. Combining Hamiltonian routing strategy with the odd-even (OE) turning model, HOFT achieves optimal selection of fault-bypass paths by real-time acquisition of local fault vector information at each node and dynamic adjustment of output port directions. It also effectively reduces the probability of routing packets becoming trapped in faulty neighborhoods. Simulation results demonstrate that compared to other fault-tolerant routing algorithms, HOFT effectively reduces network latency, increases network throughput, and exhibits superior fault tolerance capabilities.