Chip placement is a knowledge intensive engineering problem with high complexity. Existing placement generation methods basically rely on design rules and empirical patterns, while RAG systems face challenges in dynamic adaptation, entity utilization, and quality feedback. A critical limitation of current LLM-based approaches is the generation of hallucinated parameters that violate physical constraints and design rules, leading to placement failures and suboptimal results. To the best of our knowledge, no existing work has attempted to solve digital chip placement problems using dynamic RAG approaches. This paper proposes ChipDRAG, the first attempt to address digital chip placement automation through a dynamic RAG framework, featuring four core technical innovations: reinforcement learning-based dynamic retrieval and reranking, entity compression and injection, quality feedback-driven closed-loop optimization, and a novel rule-LLM generation method that effectively alleviates LLM hallucination through constraint validation and fallback mechanisms. Our approach combines the reliability of domain-specific rules with the optimization capabilities of LLMs, ensuring high parameter generation success while maintaining physical feasibility. Experiments on ISPD 2015 benchmark show 81.25% success rate and 11.4% average HPWL improvement, demonstrating the method’s effectiveness in alleviating LLM hallucination and achieving reliable digital chip placement automation.