3D human pose estimation is a critical task with applications in sports analytics, human-computer interaction, and intelligent robotics. Hybrid models that combine Graph Convolutional Networks (GCNs) and Transformers achieve high accuracy by jointly capturing spatial and temporal dependencies. However, their substantial computational and memory demands hinder real-time deployment on resource-constrained edge devices. This paper presents a heterogeneous FPGA-based accelerator specifically optimized for GCN–Transformer hybrid models. We introduce a reconfigurable dual-mode systolic array capable of seamlessly switching between Sparse Matrix Multiplication (SPMM) and General Matrix Multiplication (GEMM), thereby accommodating both sparse graph operations and dense attention computations. To enhance memory efficiency, a block based sparse storage format is adopted, while a unified nonlinear fusion unit efficiently handles Softmax, Layer Normalization (LayerNorm), and activation functions through polynomial approximations and hardware reuse. The overall design emphasizes hardware-friendly operations to ensure execution efficiency and runtime adaptability. The accelerator is implemented on a Xilinx Virtex Ul traScale+ VU9P FPGA, achieving ≤32 ms inference latency with a 60W power envelope. Experimental results demonstrate the proposed design’s effectiveness for energy-efficient, real-time 3D pose estimation at the edge. This work provides a scalable hardware solution that bridges algorithmic complexity and deployment efficiency for next-generation hybrid deep learning models.

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FPGA-Based Hybrid GCN–Transformer Accelerator for 3D Pose Estimation

  • Ziqi Zhang,
  • Yongjiang Xue,
  • Fei Qiao,
  • Qingzeng Song

摘要

3D human pose estimation is a critical task with applications in sports analytics, human-computer interaction, and intelligent robotics. Hybrid models that combine Graph Convolutional Networks (GCNs) and Transformers achieve high accuracy by jointly capturing spatial and temporal dependencies. However, their substantial computational and memory demands hinder real-time deployment on resource-constrained edge devices. This paper presents a heterogeneous FPGA-based accelerator specifically optimized for GCN–Transformer hybrid models. We introduce a reconfigurable dual-mode systolic array capable of seamlessly switching between Sparse Matrix Multiplication (SPMM) and General Matrix Multiplication (GEMM), thereby accommodating both sparse graph operations and dense attention computations. To enhance memory efficiency, a block based sparse storage format is adopted, while a unified nonlinear fusion unit efficiently handles Softmax, Layer Normalization (LayerNorm), and activation functions through polynomial approximations and hardware reuse. The overall design emphasizes hardware-friendly operations to ensure execution efficiency and runtime adaptability. The accelerator is implemented on a Xilinx Virtex Ul traScale+ VU9P FPGA, achieving ≤32 ms inference latency with a 60W power envelope. Experimental results demonstrate the proposed design’s effectiveness for energy-efficient, real-time 3D pose estimation at the edge. This work provides a scalable hardware solution that bridges algorithmic complexity and deployment efficiency for next-generation hybrid deep learning models.