At present due to power scarcity and technological evolution installation of grid connected Solar Photo Voltaic Power Plant (SPVPP) is at the peak. The main loss while connecting a SPVPP to the grid is the core loss due the transformer. Transformerless inverters are the latest approach to minimize the losses in a SPVPP. The installation of grid-connected solar photovoltaic power plants (SPVPPs) is at its height right now due to power shortages and technological advancements This paper proposes an analysis of a seven level inverter. This includes analysis using different PWN technique. The technique used to test the multi-level inverter are Nearest Level Modulation (NLM), Phase Opposition Disposition (POD), Phase Disposition (PD) and Alternate Phase Opposition Disposition using MATLAB to get an appropriate result. This topology can generate low total harmonic distortion which will reduce the number of switches used which would certainly reduce the heat emission, it reduces the cost of the circuit and it will also reduce the installation space. Seven voltage levels, lower harmonic distortions, and higher Vrms values are all features of the suggested architecture. The outcomes of the simulation have been applied to the hardware to confirm its viability and efficiency. MATLAB/SIMULINK software is used to simulate this inverter.

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Development of Multi Level Transformerless Inverter for Grid Integration of Solar Photovoltaic Power Plant

  • Rattan Kumar Venkatesan,
  • Chitra Lakshmikanthan

摘要

At present due to power scarcity and technological evolution installation of grid connected Solar Photo Voltaic Power Plant (SPVPP) is at the peak. The main loss while connecting a SPVPP to the grid is the core loss due the transformer. Transformerless inverters are the latest approach to minimize the losses in a SPVPP. The installation of grid-connected solar photovoltaic power plants (SPVPPs) is at its height right now due to power shortages and technological advancements This paper proposes an analysis of a seven level inverter. This includes analysis using different PWN technique. The technique used to test the multi-level inverter are Nearest Level Modulation (NLM), Phase Opposition Disposition (POD), Phase Disposition (PD) and Alternate Phase Opposition Disposition using MATLAB to get an appropriate result. This topology can generate low total harmonic distortion which will reduce the number of switches used which would certainly reduce the heat emission, it reduces the cost of the circuit and it will also reduce the installation space. Seven voltage levels, lower harmonic distortions, and higher Vrms values are all features of the suggested architecture. The outcomes of the simulation have been applied to the hardware to confirm its viability and efficiency. MATLAB/SIMULINK software is used to simulate this inverter.