Modeling, Control and Common-Mode Voltage Reduction Scheme for NPC Inverters
摘要
Neutral point clamped (NPC) inverters are widely adopted in industrial applications due to their superior output waveform quality and voltage stress reduction. However, the inherent common-mode voltage (CMV) generated by conventional modulation strategies can lead to critical issues such as electromagnetic interference (EMI), motor bearing currents, and insulation degradation. To address this challenge, this article first derives the switching model and average model of NPC inverters in dq0 coordinates. Based on the average model, a small-signal model is established, and the transfer function of the system is analyzed to facilitate controller design. A proportional-integral (PI) regulator is implemented, with its parameters carefully tuned through frequency-domain analysis to ensure stable DC-link voltage balance and fast dynamic response. Furthermore, a zero common-mode space vector pulse width modulation (ZCM-SVPWM) strategy is proposed to theoretically eliminate CMV by exclusively utilizing six medium vectors and one zero vector, all of which exhibit zero common-mode voltage. The switching signals are generated by pairwise subtraction of three fundamental modulated waves, achieving precise voltage synthesis. Simulation results demonstrate that the proposed ZCM-SVPWM effectively suppresses CMV while maintaining high output voltage quality. This ensures both robust performance and minimal CMV-induced adverse effects.