Scholarlink

This project utilizes the Renode simulation framework to build and acquire data from a peripheral-level simulation platform for the onboard computer of the Siyuan-2 satellite. Precise modeling of peripherals including the ADS8344 ADC converter, MAX488 RS422 communication chip, SN74 series latches, SPI memory, Darlington array drivers, CAN bus transceiver, and relay modules was performed using C#. These peripherals, along with the STM32F429 microcontroller, were integrated through REPL files to construct a complete system-on-chip (SoC) simulation platform. Subsequently, STM32CubeIDE was used to configure actual chip parameters and develop corresponding simulation programs. During simulation, one peripheral was randomly selected at regular intervals to inject one of nine random signals, generating executable ELF files. Finally, the Renode platform was used to run simulations, logging data into a three-dimensional CSV dataset that records timestamps, peripheral names, and injected signals. At the same time, the Renode platform loading file is processed to generate a complex network. This simulation method significantly enhances the efficiency and reliability of satellite electronic system design while effectively reducing the cost and risk during the design phase.

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Development of a Satellite Onboard Computer Simulation Platform and Complex Network Generation Based on Renode

  • 会议论文

  • 发表日期：

    2026年

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  • Yi Zhan,
  • Zhongcheng Mu,
  • Shufan Wu

摘要

This project utilizes the Renode simulation framework to build and acquire data from a peripheral-level simulation platform for the onboard computer of the Siyuan-2 satellite. Precise modeling of peripherals including the ADS8344 ADC converter, MAX488 RS422 communication chip, SN74 series latches, SPI memory, Darlington array drivers, CAN bus transceiver, and relay modules was performed using C#. These peripherals, along with the STM32F429 microcontroller, were integrated through REPL files to construct a complete system-on-chip (SoC) simulation platform. Subsequently, STM32CubeIDE was used to configure actual chip parameters and develop corresponding simulation programs. During simulation, one peripheral was randomly selected at regular intervals to inject one of nine random signals, generating executable ELF files. Finally, the Renode platform was used to run simulations, logging data into a three-dimensional CSV dataset that records timestamps, peripheral names, and injected signals. At the same time, the Renode platform loading file is processed to generate a complex network. This simulation method significantly enhances the efficiency and reliability of satellite electronic system design while effectively reducing the cost and risk during the design phase.