The ongoing learning of wearable devices’ neuro-signals is instrumental in the development of artificial intelligence in personalised healthcare, brain-computer interfaces, and in real-time monitoring of neurological conditions. Nevertheless, the continuous recording of neural signals in wearables is challenging due to the extreme limitations in power consumption, reducing device size, and maintaining signal integrity in the presence of noise and cross-induction conditions. The traditional neural acquisition systems use high-resolution continuous sampling and continuous processing capabilities, which require a lot of energy, hence constraining battery life and being uncomfortable for the user when used in a handheld device. To address these challenges, this paper proposes a novel ultra-low-power VLSI design framework tailored explicitly for next-generation wearable neural acquisition systems. It is a solution that features a mixed-signal architecture, combining a sub-threshold-based analogue front-end with an adaptive successive approximation register (SAR) analogue-to-digital converter (ADC). This architecture enables the dynamic variation of sampling rates in response to detected neural activity. Another innovative event-presented digital signal processing core can be significantly more energy-efficient, as its intensive computations are only activated whenever a stroke of interest occurs and are otherwise in a low-power sleep state. The system utilises aggressive power management techniques, including multi-domain power gating, power gating, and voltage scaling, to reduce dynamic and leakage power. Simulations, prototype and pilot testing reveal that the t in this power consumption design is as high as offering up to 65% per centre consumption compared with current continuous acquisition systems, as well as offering accuracy and a lot of precision, recall, and F1 scores at levels within one percentage of conventional approaches. The proposed architecture enables continuous neural monitoring over several days on miniature wearables with a 3 V battery, and can be easily industrialised, eliminating the significant constraints of existing devices. This development is an essential milestone in the realisation of truly autonomous, power-efficient neural wearables that offer near-limitless care in healthcare, cognitive care monitoring, and neuroprotein care applications.

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Ultra-Low Power VLSI Design for Continuous Neural Signal Acquisition in Next-Gen Wearables

  • Priya Vij,
  • Manish Nandy

摘要

The ongoing learning of wearable devices’ neuro-signals is instrumental in the development of artificial intelligence in personalised healthcare, brain-computer interfaces, and in real-time monitoring of neurological conditions. Nevertheless, the continuous recording of neural signals in wearables is challenging due to the extreme limitations in power consumption, reducing device size, and maintaining signal integrity in the presence of noise and cross-induction conditions. The traditional neural acquisition systems use high-resolution continuous sampling and continuous processing capabilities, which require a lot of energy, hence constraining battery life and being uncomfortable for the user when used in a handheld device. To address these challenges, this paper proposes a novel ultra-low-power VLSI design framework tailored explicitly for next-generation wearable neural acquisition systems. It is a solution that features a mixed-signal architecture, combining a sub-threshold-based analogue front-end with an adaptive successive approximation register (SAR) analogue-to-digital converter (ADC). This architecture enables the dynamic variation of sampling rates in response to detected neural activity. Another innovative event-presented digital signal processing core can be significantly more energy-efficient, as its intensive computations are only activated whenever a stroke of interest occurs and are otherwise in a low-power sleep state. The system utilises aggressive power management techniques, including multi-domain power gating, power gating, and voltage scaling, to reduce dynamic and leakage power. Simulations, prototype and pilot testing reveal that the t in this power consumption design is as high as offering up to 65% per centre consumption compared with current continuous acquisition systems, as well as offering accuracy and a lot of precision, recall, and F1 scores at levels within one percentage of conventional approaches. The proposed architecture enables continuous neural monitoring over several days on miniature wearables with a 3 V battery, and can be easily industrialised, eliminating the significant constraints of existing devices. This development is an essential milestone in the realisation of truly autonomous, power-efficient neural wearables that offer near-limitless care in healthcare, cognitive care monitoring, and neuroprotein care applications.