With rapid advancements in information technology, the security of hard drives has garnered widespread attention from both enterprises and individuals, making it a highly critical topic of research. At present, data encryption for storage security purposes is often managed using application software, hard drive controllers, or bridge encryption chips. The recommended encryption algorithm is the Advanced Encryption Standard (AES), as defined by the National Institute of Standards and Technology (NIST). Software-based encryption can increase system overhead and is vulnerable to memory attacks, such as cold boot or timing attacks. Because the computational resources of hard drive controllers are limited, their security capabilities are also limited. Although controller chips can provide encryption, their utilization is still hindered by risks such as theft-related data leaks. Encryption bridge chips are more secure and efficient. Research efforts thus far have focused on improving the speed of cryptographic algorithms, often neglecting integration with communication protocols. In this paper, we propose a Serial Advanced Technology Attachment (SATA) encryption bridge module design with automatic activation of AES-XTS functionality by analyzing the characteristics of the SATA protocol, with the results showing that the encryption loss for sequential read–write is under 10%, with 4 KB random read–write encryption achieving over 60,000 IOPS.

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SAHSCM: Self-activating and High-Speed Cryptographic Module for SATA Bridge Systems

  • Yuxi Sun,
  • Jizeng Wei,
  • Chengqiang Zong,
  • Tie Li,
  • Suyan Zhu,
  • Hui Du

摘要

With rapid advancements in information technology, the security of hard drives has garnered widespread attention from both enterprises and individuals, making it a highly critical topic of research. At present, data encryption for storage security purposes is often managed using application software, hard drive controllers, or bridge encryption chips. The recommended encryption algorithm is the Advanced Encryption Standard (AES), as defined by the National Institute of Standards and Technology (NIST). Software-based encryption can increase system overhead and is vulnerable to memory attacks, such as cold boot or timing attacks. Because the computational resources of hard drive controllers are limited, their security capabilities are also limited. Although controller chips can provide encryption, their utilization is still hindered by risks such as theft-related data leaks. Encryption bridge chips are more secure and efficient. Research efforts thus far have focused on improving the speed of cryptographic algorithms, often neglecting integration with communication protocols. In this paper, we propose a Serial Advanced Technology Attachment (SATA) encryption bridge module design with automatic activation of AES-XTS functionality by analyzing the characteristics of the SATA protocol, with the results showing that the encryption loss for sequential read–write is under 10%, with 4 KB random read–write encryption achieving over 60,000 IOPS.