Bandgap reference (BGR) circuits are fundamental to power management integrated circuits (PMICs), where they provide stable, temperature-independent voltages for analog, digital, and RF subsystems. Traditional BGRs, although effective over standard industrial temperature ranges, typically exhibit degraded performance under extreme cryogenic or high-temperature conditions due to thermal drift and unreliable start-up behavior. To address these limitations, this work proposes a simulation-based BGR design optimized for wide temperature operation from −150 to +150 °C, targeting space-grade and cryogenic PMIC applications. Implemented using the GPDK180 nm process in Cadence Virtuoso, the design avoids explicit curvature compensation and instead achieves thermal stability through carefully balanced linear CTAT–PTAT superposition. Simulation results confirm a temperature coefficient of 1.2 ppm/°C, a power supply rejection ratio (PSRR) of −99.5 dB at 1 kHz, and a transient settling time below 2.5 μs. Operating from 1.8 to 2.5 V with a quiescent current of 10 μA, the circuit provides a stable reference voltage of approximately 1.15 V. These results show that the proposed BGR is a good fit for deep-space missions, cryogenic sensor platforms, and other systems in extreme environments that need high accuracy and low-power use.

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A Cryogenically Robust Bandgap Reference with Sub-2 ppm/°C Temperature Coefficient and High PSRR for Space-Grade and Low-Temperature Power Management ICs

  • Banothu Bapuji,
  • K. A. Jyotsna

摘要

Bandgap reference (BGR) circuits are fundamental to power management integrated circuits (PMICs), where they provide stable, temperature-independent voltages for analog, digital, and RF subsystems. Traditional BGRs, although effective over standard industrial temperature ranges, typically exhibit degraded performance under extreme cryogenic or high-temperature conditions due to thermal drift and unreliable start-up behavior. To address these limitations, this work proposes a simulation-based BGR design optimized for wide temperature operation from −150 to +150 °C, targeting space-grade and cryogenic PMIC applications. Implemented using the GPDK180 nm process in Cadence Virtuoso, the design avoids explicit curvature compensation and instead achieves thermal stability through carefully balanced linear CTAT–PTAT superposition. Simulation results confirm a temperature coefficient of 1.2 ppm/°C, a power supply rejection ratio (PSRR) of −99.5 dB at 1 kHz, and a transient settling time below 2.5 μs. Operating from 1.8 to 2.5 V with a quiescent current of 10 μA, the circuit provides a stable reference voltage of approximately 1.15 V. These results show that the proposed BGR is a good fit for deep-space missions, cryogenic sensor platforms, and other systems in extreme environments that need high accuracy and low-power use.