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A novel gate-integrated cascode GaN half-bridge module is introduced, featuring a GaN cascode half-bridge with an integrated gate drive circuit on a Direct Bond Copper (DBC) substrate. This module utilizes a GaN cascode configuration, which combines a depletion-mode Metal–Insulator-Semiconductor (MIS) High-Electron-Mobility Transistor (HEMT) with a series of low-voltage silicon (Si) MOSFETs. The proposed integrated power module (IPM) is designed with a symmetric layout and optimized wire bonding, all within a compact package that utilizes DBC substrate to enhance thermal dissipation. Comprehensive static characterization confirms its electrical performance, demonstrating an on-state resistance of 330 mΩ, a threshold voltage of 4 V, and a blocking voltage capability of 800 V. The module’s dynamic behavior is assessed through a double-pulse test (DPT), analyzing the impact of switching voltage, current, and frequency. To validate its practical application, the module is tested in a synchronous buck converter setup, converting a 30 V input to an 11 V output while monitoring thermal performance using a thermal camera. This study provides a comprehensive evaluation of the gate-drive-integrated cascode half-bridge module, covering MIS-HEMT fabrication; cascode packaging; and the characterization of its static, dynamic, and buck converter performance.

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Gate-Drive-Integrated GaN HEMT Cascode Power Module (IPM) for High-Frequency Applications

  • 会议论文

  • 发表日期：

    2026年

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  • Surya Elangovan,
  • Sujatha Balasubramanian,
  • Stone Cheng,
  • Edward Yi Chang,
  • Chang-Ching Tu,
  • Yi-Kai Hsiao,
  • Tejender Singh Rawat,
  • J. Preetha Roselyn,
  • Hao-Chung Kuo

摘要

A novel gate-integrated cascode GaN half-bridge module is introduced, featuring a GaN cascode half-bridge with an integrated gate drive circuit on a Direct Bond Copper (DBC) substrate. This module utilizes a GaN cascode configuration, which combines a depletion-mode Metal–Insulator-Semiconductor (MIS) High-Electron-Mobility Transistor (HEMT) with a series of low-voltage silicon (Si) MOSFETs. The proposed integrated power module (IPM) is designed with a symmetric layout and optimized wire bonding, all within a compact package that utilizes DBC substrate to enhance thermal dissipation. Comprehensive static characterization confirms its electrical performance, demonstrating an on-state resistance of 330 mΩ, a threshold voltage of 4 V, and a blocking voltage capability of 800 V. The module’s dynamic behavior is assessed through a double-pulse test (DPT), analyzing the impact of switching voltage, current, and frequency. To validate its practical application, the module is tested in a synchronous buck converter setup, converting a 30 V input to an 11 V output while monitoring thermal performance using a thermal camera. This study provides a comprehensive evaluation of the gate-drive-integrated cascode half-bridge module, covering MIS-HEMT fabrication; cascode packaging; and the characterization of its static, dynamic, and buck converter performance.