Resource Optimization for FPGA-Based SM9 Digital Signature Algorithm
摘要
SM9 digital signature algorithm is a widely applicable cryptographic scheme for user identity verification that demonstrates superior security and scalability, especially for large-scale deployments requiring efficient key management. These characteristics make it a robust solution for diverse applications, particularly in Internet-driven environments. However, it has problems with large resource consumption of Field-Programmable Gate Arrays (FPGA) acceleration. To address this problem, we propose a resource-oriented architecture based on FPGA. This approach optimizes redundant logic units and leverages the sharing processing capabilities of FPGA to handle tasks in a resource-constrained environment. Experimental results demonstrate a 40–75% reduction in resource utilization for critical operations, such as modular inversion and exponentiation, while maintaining acceptable latency.