In designing central processing unit (CPU) schedulers, performance and energy efficiency are two critical key factors. To optimize the performance and energy efficiency of CPU schedulers, we developed a Task-Aware Scheduling Framework (TADF). TADF leverages CPU Dynamic Voltage and Frequency Scaling (DVFS) utilizing heterogeneous characteristics and task features to establish accurate power consumption and performance models. During runtime, it selects the most Energy-Delay Product (EDP) optimal frequency point and core type for tasks, optimizing performance and power consumption. TADF supports user performance constraints, allowing the adjustment of scheduling strategies according to user requirements, thus ensuring significant power consumption optimization while meeting performance demands. Compared to the default strategies, TADF improved CPU energy by 20.15% and Energy-Delay Product (EDP) by 48.68%.

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Task-Aware Scheduling Framework: Task Aware Dynamic Voltage and Frequency Scaling and Scheduling for HMP

  • Jintao Ge,
  • Yuzhao Liang,
  • Xing Gao

摘要

In designing central processing unit (CPU) schedulers, performance and energy efficiency are two critical key factors. To optimize the performance and energy efficiency of CPU schedulers, we developed a Task-Aware Scheduling Framework (TADF). TADF leverages CPU Dynamic Voltage and Frequency Scaling (DVFS) utilizing heterogeneous characteristics and task features to establish accurate power consumption and performance models. During runtime, it selects the most Energy-Delay Product (EDP) optimal frequency point and core type for tasks, optimizing performance and power consumption. TADF supports user performance constraints, allowing the adjustment of scheduling strategies according to user requirements, thus ensuring significant power consumption optimization while meeting performance demands. Compared to the default strategies, TADF improved CPU energy by 20.15% and Energy-Delay Product (EDP) by 48.68%.