Active RISs: Modeling and Optimization

Reconfigurable Intelligent Surfaces (RIS)-empowered communication has emerged as a transformative technology for next generation wireless networks, enabling the programmable shaping of the propagation environment. However, conventional passive RISs are fundamentally limited by the double path loss effect, which severely attenuates the reflected signals. To overcome this, active RIS architectures, capable of amplifying impinging signals, have been proposed. This chapter investigates the modeling, performance analysis, and optimization of active RISs, focusing on two hardware designs: a dual-RIS structure with a single Power Amplifier (PA), and a reflection amplification structure at the unit cell level using tunnel diodes. For the single PA-based design, a comprehensive mathematical model is developed, and closed-form expressions for the received signal-to-noise ratio, bit error probability, and Energy Efficiency (EE) are derived. An optimization framework for configuring the phase shifts and amplifier gain is proposed to maximize system capacity under power constraints. Moreover, a reflection amplification model based on tunnel diodes is introduced, where each unit cell is modeled as a transmission line circuit terminated by a reconfigurable impedance. Regarding the second design, the integration of a tunnel diode into the unit cell is carefully studied by analyzing its I–V characteristic, enabling the derivation of the negative resistance range and the respective power consumption model. Furthermore, the intrinsic phase-amplitude coupling of the reflection coefficient is characterized through compact linear algebra formulations, enabling practical optimization of active RISs. Extensive numerical simulations for both considered architectures validate the theoretical analyses, demonstrating that active RISs can effectively overcome the double path loss limitation, significantly enhance system performance, and achieve favorable EE trade-offs compared to passive RISs, albeit with increased hardware complexity and power consumption. Finally, the fundamental trade-off between the available power budget and the number of active elements is examined, revealing that a higher number of active elements does not always lead to optimal performance.