Inference of transformer-based large language models (LLMs) is both compute- and memory-intensive. To address this, prior work adopts heterogeneous systems that combine processing-in-memory (PIM) architectures for memory-bound matrix-vector multiplication (GEMV) and neural processing units for compute-bound matrix-matrix multiplication (GEMM). However, these designs suffer from low hardware utilization during edge inference, primarily due to the limited parallelism available in single-batch processing. This paper presents HB-PIM, a hybrid bonding-based PIM architecture with dual-mode execution support. HB-PIM employs a software-hardware co-designed approach, enabling efficient LLM inference. At the hardware level, HB-PIM leverages high-density copper interconnects to integrate logic and DRAM dies, providing high inter-die memory bandwidth and substantial compute capability. A dual-mode processing unit (DuoPU) on the logic die is designed to support adaptive execution of both GEMV and GEMM operations. At the software level, a scheduling framework is introduced to optimize workload partitioning and data mapping. We demonstrate the effectiveness of the proposed schemes using extensive experiments. Experimental results show that HB-PIM significantly enhances hardware utilization while reducing processing latency compared to state-of-the-art baselines.