Virtual-Real Comprehensive Current Limiting Method with SFCL for Solid-State Transformer
摘要
In this section, the evolution of fault currents in solid-state transformers (SSTs) during the occurrence of a short-circuit fault is analyzed from the point of view of theoretical derivation. During normal operation, the SST is connected to the medium-voltage main grid at the high-voltage stage and to the microgrid at the low-voltage stage. When encountering a short-circuit fault in the main grid, the short-circuit fault characterization of the SST is carried out by establishing an equivalent circuit.