Evaluating non-functional properties such as power consumption on microcontroller platforms exposes a gap between abstraction layers: while programs execute at the Instruction Set Architecture (ISA) level, energy consumption is determined at the circuit level. This connection between system and circuit layers is especially relevant when modeling non-functional processor properties. Modern approaches (e.g., deep neural networks) rely on large datasets, which in turn require automated methods that generate consistent labelling between programs and their measured energy consumption and latency. We introduce an open-source, automated framework that applies a measurement-based approach for energy consumption and latency characterization. The framework allows users to treat hardware as a physical black box while still obtaining measurements of instruction sequences, even without performance counters or integrated power-monitoring infrastructure. The system is built entirely from low-cost commercial off-the-shelf (COTS) components. It relies on repeated measurement cycles, averaging many iterations of the same program under test. Each cycle includes a state-flush routine, which executes code intending to reset the microarchitectural state to capture state-dependent effects. Preliminary experiments on two RISC-V platforms (ESP32-C6 and BananaPi BPi-F3) reveal that some of the tested state-flush methods introduce a high degree of unwanted noise, especially for energy measurements.