BERT-Inspired HT Localization on FPGA AI Accelerators
摘要
Outsourcing accelerates AI hardware development but exposes designs to hardware Trojan (HT) risks. The stealthy nature of HTs and increasing complexity of CNN accelerators limit the effectiveness of traditional detection and localization techniques. This paper presents a segmentation-driven power side-channel framework combined with a customized BERT-inspired model to localize HT-affected regions relative to a trusted baseline. By dividing traces into segments and analyzing them with transformer attention, the method enables targeted auditing and reduces manual inspection. Experiments on real power measurements with physical HTs achieve 92.1% localization accuracy on known HTs and 75.2% on unseen HTs. Contributions include a pre-processing pipeline for segmented trace analysis, a BERT-style architecture optimized for HT localization, and demonstrated generalization across multiple HT instances. The approach supports efficient, focused security audits in outsourced fabrication workflows.