In this paper, we propose an architectural schema for scaling up the quantum teleportation protocol developed in Ref. [1] to enable the simultaneous exchange of a large number of single qubits between two quantum communicators using quantum main memory. This schema is designed to integrate Q1RAM, the fastest main memory for quantum computers, allowing both reading and writing operations to be executed efficiently. Two Q1RAMs are included in this schema: one on the sender side and the other on the receiver’s side. EPR pairs source generates a set of identical Bell states simultaneously. The first particles in each EPR pair are sent to the sender, while the second particles in each EPR pair state are sent to the receiver through fiber optics or quantum satellites. These particles are received in the quantum data bus in each Q1RAM, and the addresses of the memory cells for these particles are assigned by the quantum processing unit. Consequently, a set m of half EPR pair qubits is stored in the memory cell in Q1RAMs on the sender and receiver sides. Next, the quantum gates of the quantum teleportation protocol [1] are executed in parallel between each qubit in the message and a qubit, which stores one particle of an EPR pair, in the Q1RAM’s memory cell on the sender side. The sender measures, at the same time, each pair of the qubit message and the qubit in the memory cells in Q1RAM, which he used to apply to them the quantum gates of the quantum teleportation protocol [1]. The sender then sends the measurement outcomes to the receiver using a classical channel of digital classical bits. The receiver corrects the states of each qubit in his Q1RAM’s memory cells based on the received data from the sender.