Fourier Ptychographic Microscopy (FPM) enables high-resolution imaging over a wide field of view through computational reconstruction, making it an effective alternative to more expensive traditional optical systems. However, its practical application is limited by the high computational demands of its iterative algorithms. In this context, a proof of concept (PoC) is presented to validate the functional execution of a ptychographic reconstruction pipeline on an embedded Field Programmable System-on-Chip (FPSoC) platform. The main objective was to demonstrate that the algorithm can run locally and autonomously within the processing system (PS), using Jupyter Notebooks (Jupyter Lab) inside the PYNQ environment, without yet applying optimization techniques aimed at accelerating the algorithm. The original Python code was adapted to the ARM architecture without altering its algorithmic structure. A 3  \(\times \)  3 illumination matrix with pre-acquired images was used. The system successfully executed the entire process—from data loading to visualization of the reconstructed object—with a total execution time of 111.77 s. Although this execution time is higher than that recorded on a workstation (17.12 s), the result validates the algorithm’s functionality in an embedded environment. This development lays the foundation for future acceleration in the programmable logic (PL) through the identification of repetitive and highly parallelizable code sections in Vitis HLS, aiming at portable and low-power solutions for computational microscopy.

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Proof of Concept of a PYNQ-Based Accelerator for the Fourier Ptychographic Microscopy Algorithm

  • Cristian Linares,
  • Jairo Cuero,
  • Andres-F. Jimenez,
  • Angel Cruz-Roa

摘要

Fourier Ptychographic Microscopy (FPM) enables high-resolution imaging over a wide field of view through computational reconstruction, making it an effective alternative to more expensive traditional optical systems. However, its practical application is limited by the high computational demands of its iterative algorithms. In this context, a proof of concept (PoC) is presented to validate the functional execution of a ptychographic reconstruction pipeline on an embedded Field Programmable System-on-Chip (FPSoC) platform. The main objective was to demonstrate that the algorithm can run locally and autonomously within the processing system (PS), using Jupyter Notebooks (Jupyter Lab) inside the PYNQ environment, without yet applying optimization techniques aimed at accelerating the algorithm. The original Python code was adapted to the ARM architecture without altering its algorithmic structure. A 3  \(\times \)  3 illumination matrix with pre-acquired images was used. The system successfully executed the entire process—from data loading to visualization of the reconstructed object—with a total execution time of 111.77 s. Although this execution time is higher than that recorded on a workstation (17.12 s), the result validates the algorithm’s functionality in an embedded environment. This development lays the foundation for future acceleration in the programmable logic (PL) through the identification of repetitive and highly parallelizable code sections in Vitis HLS, aiming at portable and low-power solutions for computational microscopy.