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PWe present a heterogeneous (CPU-GPU) implementation of a multilevel DWT-based ECG pipeline on the NVIDIA Jetson Nano, where all computation-intensive stages are executed on the Maxwell GPU in one CUDA stream. The key optimizations are constant-memory filter taps, shared-memory tiling, and pre-allocated buffers, which together enable maximum on-chip data reuse and hide global-memory latency. Processing time exhibits \(\approx 1\,\textrm{ms}\) on a desktop GPU and \(\approx 2\,\textrm{ms}\) on Jetson Nano, without degrading detection accuracy.

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Embedded Parallel CUDA-Based ECG Signal Processing with Multilevel DWT and Memory Optimisation

  • 会议论文

  • 发表日期：

    2026年

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  • Hanane Elferdaoussi,
  • Mostafa Laaboubi,
  • Wissam Jenkal,
  • Rachid Latif

摘要

PWe present a heterogeneous (CPU-GPU) implementation of a multilevel DWT-based ECG pipeline on the NVIDIA Jetson Nano, where all computation-intensive stages are executed on the Maxwell GPU in one CUDA stream. The key optimizations are constant-memory filter taps, shared-memory tiling, and pre-allocated buffers, which together enable maximum on-chip data reuse and hide global-memory latency. Processing time exhibits \(\approx 1\,\textrm{ms}\) on a desktop GPU and \(\approx 2\,\textrm{ms}\) on Jetson Nano, without degrading detection accuracy.