Deep neural networks (DNNs) need to be more efficient in both speed and power efficiency, in order to realize their full potential. Analog in-memory computing is a promising technology for improving the speed and power efficiency of DNNs by multiple orders. It can also potentially break the “memory wall” that is currently a main bottleneck for AI. This work surveys results on Analog Error-Correcting Codes (Analog ECCs), which are designed to make analog in-memory computing more dependable. Analog ECCs consider small ubiquitous noise as tolerable, and correct significant errors in computing. The codes are applied to vector-matrix multiplication, which is a domination type of computing in DNNs. This work introduces a linear-programming based algorithm designed to measure the error-correction capability of Analog ECCs. And a number of code constructions for Analog ECCs are presented.