This chapter introduces cuDOLFINx, a Python package that extends FEniCSx with GPU-accelerated assembly capabilities. The extension enables FEniCSx codes to be accelerated on the GPU with minimal changes and provides an easy way for researchers to experiment with GPU-accelerated partial differential equation solvers. By contrast with previous efforts to enhance FEniCSx with GPU capabilities, cuDOLFINx is designed as a standalone package and does not require major changes to the core components of FEniCSx. Consequently, it has the potential to become a usable part of the FEniCSx ecosystem and a long-term solution to the problem of providing GPU acceleration capabilities in FEniCSx. We further present performance benchmarks for representative GPU-accelerated FEniCSx applications on an NVIDIA GH200 GPU. Our results indicate that GPU-accelerated assembly routines within cuDOLFINx can be up to 40 times faster than traditional FEniCSx assembly with MPI parallelisation on a multi-core CPU node.

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cuDOLFINx: A CUDA Extension for FEniCSx

  • Benjamin A. Pachev,
  • James D. Trotter,
  • Igor A. Baratta

摘要

This chapter introduces cuDOLFINx, a Python package that extends FEniCSx with GPU-accelerated assembly capabilities. The extension enables FEniCSx codes to be accelerated on the GPU with minimal changes and provides an easy way for researchers to experiment with GPU-accelerated partial differential equation solvers. By contrast with previous efforts to enhance FEniCSx with GPU capabilities, cuDOLFINx is designed as a standalone package and does not require major changes to the core components of FEniCSx. Consequently, it has the potential to become a usable part of the FEniCSx ecosystem and a long-term solution to the problem of providing GPU acceleration capabilities in FEniCSx. We further present performance benchmarks for representative GPU-accelerated FEniCSx applications on an NVIDIA GH200 GPU. Our results indicate that GPU-accelerated assembly routines within cuDOLFINx can be up to 40 times faster than traditional FEniCSx assembly with MPI parallelisation on a multi-core CPU node.