Traditional SPICE tools lack a unified way to couple firmware, digital logic, or AI with analog solvers. We propose a vendor neutral External Oracle Component interface that exchanges circuit state with external processes at each solver step while preserving numerical stability. The interface standardizes ideal voltage, ideal current, and Norton equivalent models with portable netlist syntax and minimal MNA stamping. By design, it is straightforward for SPICE developers to implement; efficient for simulation developers to author and debug; and runtime efficient through compact encodings and step synchronous zero-order hold semantics. A prototype matches native sources in DC operating point and sweep tests and replaces a constant power load in a buck converter via XN, enabling integration without simulator recompilation. This lowest cost path to universal adaptability could materially reduce non-recurring engineering costs for AI in the loop experiments.

错误:搜索内容不能为空,请输入英文关键词
错误:关键词超出字数限制,请精简
高级检索

SPICE Integration Standard for External Oracle Components Enabling Hybrid Simulation of AI in Power System Design

  • Jason Pyeron

摘要

Traditional SPICE tools lack a unified way to couple firmware, digital logic, or AI with analog solvers. We propose a vendor neutral External Oracle Component interface that exchanges circuit state with external processes at each solver step while preserving numerical stability. The interface standardizes ideal voltage, ideal current, and Norton equivalent models with portable netlist syntax and minimal MNA stamping. By design, it is straightforward for SPICE developers to implement; efficient for simulation developers to author and debug; and runtime efficient through compact encodings and step synchronous zero-order hold semantics. A prototype matches native sources in DC operating point and sweep tests and replaces a constant power load in a buck converter via XN, enabling integration without simulator recompilation. This lowest cost path to universal adaptability could materially reduce non-recurring engineering costs for AI in the loop experiments.