FrodoKEM is a Post-Quantum (PQ) Key Encapsulation Mechanism (KEM) built on the Learning with Errors (LWE) problem. Unlike other lattice-based approaches, it avoids using structured lattices to enhance its resilience against attacks. FrodoKEM is selected as a Round 3 alternate candidate in the US National Institute of Standards and Technology (NIST) Post-Quantum Cryptography (PQC) Standardization competition, recommended/accepted by several information security agencies in the world, and currently being reviewed for adoption by the International Organization for Standardization (ISO), which calls for efficient real-world implementations of the algorithm. This paper introduces an optimized Field Programmable Gate Array (FPGA)-based architecture for FrodoKEM that achieves up to a factor of 3.5 reduction in resource utilization compared to existing studies, eliminates the need for Digital Signal Processing (DSP) blocks in FPGA implementations, reduces the number of required BRAMs, and delivers up to 9.7 times the throughput. The architecture benefits from parallelization, which results in faster performance, and it integrates key generation, encapsulation, and decapsulation into a single unified implementation that supports all three parameter sets; FrodoKEM-640, FrodoKEM-976, and FrodoKEM-1344.

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An Optimized FrodoKEM Implementation on Reconfigurable Hardware

  • Giuseppe Manzoni,
  • Shekoufeh Neisarian,
  • Elif Bilge Kavun

摘要

FrodoKEM is a Post-Quantum (PQ) Key Encapsulation Mechanism (KEM) built on the Learning with Errors (LWE) problem. Unlike other lattice-based approaches, it avoids using structured lattices to enhance its resilience against attacks. FrodoKEM is selected as a Round 3 alternate candidate in the US National Institute of Standards and Technology (NIST) Post-Quantum Cryptography (PQC) Standardization competition, recommended/accepted by several information security agencies in the world, and currently being reviewed for adoption by the International Organization for Standardization (ISO), which calls for efficient real-world implementations of the algorithm. This paper introduces an optimized Field Programmable Gate Array (FPGA)-based architecture for FrodoKEM that achieves up to a factor of 3.5 reduction in resource utilization compared to existing studies, eliminates the need for Digital Signal Processing (DSP) blocks in FPGA implementations, reduces the number of required BRAMs, and delivers up to 9.7 times the throughput. The architecture benefits from parallelization, which results in faster performance, and it integrates key generation, encapsulation, and decapsulation into a single unified implementation that supports all three parameter sets; FrodoKEM-640, FrodoKEM-976, and FrodoKEM-1344.