This paper presents a novel three-phase, three-level transformerless inverter design that reduces the number of switching power devices required to mitigate common-mode voltage, offering a significant advantage over traditional multilevel inverters (MLIs). The proposed design utilizes the unique features of the switched-capacitor (SC) unit, such as voltage-boosting capability, transformerless operation, and inherent self-voltage balancing. Furthermore, a predictive current control strategy is implemented, where the cost function is evaluated for all available switching states. The cost function is primarily designed to minimize the current tracking error while also incorporating common-mode voltage as a secondary term to mitigate its adverse effects, such as electromagnetic interference and motor insulation stress. Each switching state is analyzed based on how well it satisfies the optimization criteria, and the state that achieves the best balance between minimizing the current error and controlling the common-mode voltage is selected. This optimal state is then used to generate the gating signals for the inverter, ensuring efficient and reliable system operation. This approach ensures the selection of an optimized voltage vector for enhanced system performance. Comparative analysis with conventional topologies highlights the superiority of the proposed design in terms of reduced switching device count and improved performance. Simulation results further confirm the effectiveness of the proposed topology in achieving the desired objectives.