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For ultra deep sub-micron technologies, charge sharing affects areas beyond the standard cell dimensions. Scaling up cells to ensure no charge sharing occurs inside therefore would have a major negative impact on area efficiency. We propose a D-flip-flop based on the principles of multi-bit flip-flops with integrated majority voters for the Triple Modular Redundancy (TMR) scheme, where the internal triplicated elements respect the critical spacing requirement and the cell can be used as a intrinsic rad-hard cell that requires no additional radiation mitigation on system level. We discuss the design trade-offs and compare the performance parameters of single- and multi-bit D-flip-flops from the standard library with the designed 2-bit TMR and 1-bit (Dual Interlocked Cell-based (DICE) DFFs.

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Radiation Hardening by Design Concepts for 7-nm FinFET Technologies

  • 会议论文

  • 发表日期：

    2026年

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  • Maxim Gorbunov,
  • Alican Caglar,
  • Sivaramakrishnan Hariharakrishnan,
  • Evgenii Timokhin,
  • Marcel van de Burgwal,
  • Laurent Berti,
  • Geert Thys,
  • Nidhish Gaur

摘要

For ultra deep sub-micron technologies, charge sharing affects areas beyond the standard cell dimensions. Scaling up cells to ensure no charge sharing occurs inside therefore would have a major negative impact on area efficiency. We propose a D-flip-flop based on the principles of multi-bit flip-flops with integrated majority voters for the Triple Modular Redundancy (TMR) scheme, where the internal triplicated elements respect the critical spacing requirement and the cell can be used as a intrinsic rad-hard cell that requires no additional radiation mitigation on system level. We discuss the design trade-offs and compare the performance parameters of single- and multi-bit D-flip-flops from the standard library with the designed 2-bit TMR and 1-bit (Dual Interlocked Cell-based (DICE) DFFs.