At the European X-ray Free Electron Laser (EuXFEL) in Hamburg, the DEPFET Sensor with Signal Compression (DSSC) project has built a megapixel X-ray camera that records images at 4.5 MHz, generating up to 134 Gbit/s. Its two-stage data-acquisition (DAQ) chain-16 Spartan-6 FPGA boards followed by four Kintex-7 boards—cannot satisfy future needs. Our work modernises this DAQ to future-proof the camera, simplify read-out, and boost performance. We began by analysing and refactoring the firmware and custom Linux build, eliminating faults, adding features, and improving robustness and ease of use. In parallel we evaluated replacement technologies, mindful that the current FPGAs are nearing end-of-life. Xilinx’s UltraScale+ family emerged as the optimal platform, offering higher clock rates, larger logic and memory pools, and multi-gigabit transceivers with superior energy efficiency. A rigorous comparison of candidate UltraScale+ devices considered area, power, and timing. The selected chips provide ample resources for existing algorithms while opening headroom for future upgrades to the DSSC camera and other EuXFEL instruments. Deploying them will merge today’s two DAQ stages into a simpler, faster, and more scalable architecture that sustains the 134 Gbit/s stream and beyond.