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The paper presents a novel approach to formal verification and debugging of modular (2n − 1) multipliers. It takes advantage of the regular array structure of such multipliers and models them as a system of linear equations. The method is significantly more effective than the popular symbolic computer algebra and algebraic rewriting techniques, allowing verification of 512-bit multipliers in single minutes. Furthermore, it naturally enables debugging as an integral part of the verification process, an important feature not offered by other known approaches.

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Verification and Debugging of Modular (2n − 1) Multipliers Using Linear Algebra Technique

  • 会议论文

  • 发表日期：

    2026年

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  • Jiteshri Dasari,
  • Cunxi Yu,
  • Maciej Ciesielski

摘要

The paper presents a novel approach to formal verification and debugging of modular (2n − 1) multipliers. It takes advantage of the regular array structure of such multipliers and models them as a system of linear equations. The method is significantly more effective than the popular symbolic computer algebra and algebraic rewriting techniques, allowing verification of 512-bit multipliers in single minutes. Furthermore, it naturally enables debugging as an integral part of the verification process, an important feature not offered by other known approaches.