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The study presents the results of developing a combined TCAD-SPICE model of the behavior of CMOS memory cells under space impact conditions. The study analyzes both degradation from prolonged cosmic radiation and single-event upsets (SEUs) caused by high-energy particle strikes, which can flip memory states in space-based electronics. The dependence of SEU hardness on cell size is examined for process nodes of 90, 65, and 28 nm. Additionally, the influence of critical design parameters—including channel width, supply voltage, and drain or source junction depth—on single-event upset (SEU) susceptibility is investigated.

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TCAD-SPICE Analysis of SEU and Reliability in Space-Grade SRAM from 90 nm to 28 nm

  • 会议论文

  • 发表日期：

    2026年

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  • Konstantin O. Petrosyants,
  • Igor A. Kharitonov,
  • Denis S. Silkin

摘要

The study presents the results of developing a combined TCAD-SPICE model of the behavior of CMOS memory cells under space impact conditions. The study analyzes both degradation from prolonged cosmic radiation and single-event upsets (SEUs) caused by high-energy particle strikes, which can flip memory states in space-based electronics. The dependence of SEU hardness on cell size is examined for process nodes of 90, 65, and 28 nm. Additionally, the influence of critical design parameters—including channel width, supply voltage, and drain or source junction depth—on single-event upset (SEU) susceptibility is investigated.