This study defines a small and easy-to-use language for parallel computational applications on standard and embedded hardware that brings in several original concepts and a prototypical programming environment. Embedded systems often operate on multiple processors integrated at the chip or circuit board levels and may use PC nodes for user interfacing and as computational resources. The language, π-Nets, provides SIMD and thread parallelism from scratch, and supports the distribution of threads to application-specific networks of processors structurally defined through net lists. Embedded signal processing uses fixed and block floating point data besides the common integer and floating point numbers, other applications have high precision requirements. The language supports all of these by treating the encoding of numbers chosen for some algorithm as a machine-oriented parameter for its execution, and defines algorithms for a single abstract base type of real numbers only. This greatly simplifies the type system and gives room for a few mathematical extras such as automatic differentiation or the automated handling of coordinate changes to geometric structures. While algorithms are defined in a functional style w/o using variables, threads can use them and then implement real automata. The resulting automata network is also described structurally. The language can also be used as a hardware design language (HDL) for the FPGA as a configurable hardware platform for embedded systems. Its cyclic processes then compile to parallel circuits, e.g. adders and multipliers for non-standard number codes. The current compiler environment receives program input from a standard program editor or from a text processor to dispose of special characters, and has been designed to support the GPU, multiple PC cores, and neural networks accelerator hardware also found in recent single chip systems along with an FPGA and standard processors.