Lane Departure Warning and Correction System with Control Logic on FPGA
摘要
The goal of this paper is to leverage Field Programmable Gate Array (FPGA) technology to create a Lane Departure Warning and Correction System. Its Advanced Driver Assistance System (ADAS) design attempts to improve vehicle safety by avoiding in advertent lane changes. Under a variety of driving circumstances, such as changes in lighting, weather and road types, the system reliably detects lane boundaries by utilizing image processing techniques like Hough Transform and Canny Edge Detection. The Xilinx Zynq Ultra scale FPGA, which combines high-performance processors and peripherals for real- time processing and control, is used in the implementation. In order to guarantee that the car stays in its lane, the system is made to deal with issues like faded markers, shadows, and construction zones. It does this by promptly sending out alerts or taking remedial action. By addressing real-world issues in autonomous and semi-autonomous vehicles, this breakthrough highlights the emerging of strong hardware and cutting-edge algorithms, greatly lowering the risks associated with lane departure incidents.