RISC-V is an open-source Instruction Set Architecture (ISA) designed with a modular and extensible structure, allowing for customizable implementations. Its simplified base ISA, combined with optional standard and custom extensions, provides flexibility for a wide range of computing applications, from embedded systems to high-performance computing. Its open design accelerates innovation and customization but also introduces security challenges by exposing the architecture to potential attacks. While RISC-V offers significant advantages, its lack of standardized security features compared to proprietary ISAs like ARM and x86 highlights persistent risks, particularly in security-critical applications. For this reason, scrutiny of RISC-V’s security is crucial due to its widespread use in academia and its adoption by countries like India and China, who are looking to benefit from its open nature. We review the current security challenges in RISC-V, examining key vulnerabilities that exist in areas such as the microarchitecture, trusted execution environments, secure enclaves, secure boot, cryptographic instruction set architectures, memory encryption, and electromagnetic fault injection attacks. This review aims to cater to the needs of modern researchers for the development and implementation of the RISC-V ISA in a secure manner.