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This study introduces various recently suggested multilevel power converters to improve the topology's dependability used in safety–critical applications. The proposed topologies improve the fault-tolerant (FT) capability in semiconductor power devices under any open-circuit (OC) fault. These topologies have generally reduced device MLIs (RD-MLIs). Furthermore, the proposed single-phase fault-tolerant (SPFT) topologies of the proposed circuit naturally achieve self-voltage balancing (SVB) ability, high efficiency and control effortlessness. Multi-carrier pulse-width modulation (PWM) technique is accepted to generate the switching pulses. Finally, the operating principles of the suggested FT-MLI topologies in a MATLAB/SIMULINK are verified by the experimental output obtained in the lab prototype.

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Investigation of Fault-Tolerant Multilevel Inverter Topologies

  • 章节

  • 发表日期：

    2025年

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  • Dhananjay Kumar,
  • Santosh Kumar Gupta,
  • Vishal Rathore,
  • Kasinath Jena,
  • Ramjee Prasad Gupta,
  • Samar Anand,
  • Kumar Rahul,
  • Shahzad Ahsan

摘要

This study introduces various recently suggested multilevel power converters to improve the topology's dependability used in safety–critical applications. The proposed topologies improve the fault-tolerant (FT) capability in semiconductor power devices under any open-circuit (OC) fault. These topologies have generally reduced device MLIs (RD-MLIs). Furthermore, the proposed single-phase fault-tolerant (SPFT) topologies of the proposed circuit naturally achieve self-voltage balancing (SVB) ability, high efficiency and control effortlessness. Multi-carrier pulse-width modulation (PWM) technique is accepted to generate the switching pulses. Finally, the operating principles of the suggested FT-MLI topologies in a MATLAB/SIMULINK are verified by the experimental output obtained in the lab prototype.