This work presents a reduced device count (RDC) asymmetrical cross-connected seventeen-level T-type (CT-type) inverter. The proposed approach includes eight power switches, four self-voltage balancing capacitors and two direct current (DC) sources. The suggested architecture eliminates the need for an H-bridge to generate negative half-cycle, hence reducing the voltage stress across the switches. The capacitor and DC sources cascaded with the switches to produce required number of levels. This design is exceptionally conducive to the incorporation of the renewable energy sources into the grid because of its significant self and high voltage balancing capability. Gate driver signals for the inverter circuit are produce by pulse width modulation based on the level-shifted technique. Comparative analysis is undertaken to validate the efficacy of the suggested topology which is distinguished against previously reported topologies based on the number of DC sources and capacitor count, switches, drivers and total standing voltage. Finally, the feasibility of the proposed topology is examined by the simulated results and is further verified by a laboratory prototype.