The paper considers the application of the projection method for fault tolerance of computing systems operating in a residue number system. Application of the projection method requires comparison of the results of each step with the value of the working range. The comparison operation in the residue number system is computationally complex. To overcome this problem, we propose the use of a mixed radix conversion, the translation to which from RNS can be significantly optimized compared to methods based on the Chinese residue theorem. Modeling and computational experiment on the ASIC was performed in the RTL and physical synthesis environment of Cadence Genus Synthesis Solution. This allowed the hardware implementation of fault tolerance mechanisms to be investigated.