Cryptographic schemes relying on Lattice-based hard learning problems are popular options for post-quantum signature and key encapsulation. This is for example witnessed by the selection of CRYSTALS-Dilithium and CRYSTALS-Kyber as new standards by the National Institute for Standards and Technology (NIST). Many other algorithms are currently being considered by the scientific community. All lattice-based algorithms rely on polynomial operations, among which the polynomial multiplication is generally one of the most expensive from the implementation viewpoint. As a result, the Number Theoretic Transform (NTT) is very frequently considered to speed up the implementations of these algorithms. For this purpose, we propose a semi-generic lightweight hardware architecture that supports polynomial operations for multiple lattice-based schemes, namely Dilithium, Hawk, Raccoon, Kyber and Polka. Implementation results on an Artix-7 FPGA show that our design features a relatively small footprint compared to state-of-the-art implementations. For example, our polynomial arithmetic core requires 2604 LUTs, 770 FFs and 4 DSPs for Dilithium and 1583 LUTs, 458 FFs and 2 DSPs for Kyber and can operate at 100 MHz. It computes NTT/INTT, point-wise-multiplication, multiply-accumulate and addition/subtraction in 519, 134, 135 and 131 clock cycles for Dilithium and in 455, 134, 135 and 131 clock cycles for Kyber, respectively.