Very low power consumption and impeccable reliability are the crucial requirements of implantable electronics. Extremely small power utilization necessitates close attention to power management and budgeting. Together with reliability considerations, it impacts circuit design and fabrication processes, besides influencing the testing methodologies. Reliability physics and failure mechanisms must also be reexamined. An obvious outcome is that the standard designs and processes available from wafer foundries no longer hold; they need to be suitably modified from the viewpoint of power saving and reliability enhancement. The demands become more appalling in the wake of increasing system complexity without concomitantly making more power available.