This chapter examines the state-of-art heterogeneous bipolar transistor model, based on the VBIC architecture. VBIC (Vertical Bipolar Inter Company) is a semiconductor industry specification to include the effects of parasitic capacitances and inductances on the performance characteristics of all homogeneous|heterogeneous transistors operating at radio frequency and microwave frequency ranges. The original Gummel Poon model for the bipolar transistor, as included in the gold standard electrical|electronic circuit simulation and performance evaluation tool SPICE (Simulation Program with Integrated Circuit Emphasis) does not include these parasitic effects. The VBIC model enhances the original Gummel Poon model so that SPICE simulations run with the VBIC enhanced Gummel Poon model can capture the effects of the unavoidable parasitics. The core HBT model and the VBIC specification was integrated by a pioneering team of researchers at Chalmers University.