Engineers used to look at hardware and software as separate entities that combined only at the end of development. However, due to the massive improvement in technology, engineers are now equipped with both tools and knowledge to produce more efficient systems with hardware and software co-designed in the early phases of development. One interesting technology in this field is Application-Specific Instruction Set Processor (ASIP), which sits between General-Purpose Processors (GPPs) and Single-Purpose Processors (SPPs). ASIP takes advantage of both hardware and software to build processors customized for specific tasks. This paper presents an ASIP Design Flow Automation (ADFA) tool. The tool enables users to describe a high-level model, from which corresponding Hardware Description Language (HDL) code for an ASIP can be automatically generated. The generated code can be seamlessly compiled and synthesized to run efficiently on state-of-the-art Field Programmable Gate Arrays (FPGAs). The design process allows users to make critical choices that impact the resulting hardware, including considerations such as the degree of parallelism, depth of pipelines, and hardware area utilization. The output of this development environment includes models, systematic refinements, and executable code, facilitating the creation of customized ASIPs for various applications.