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This work presents a structured approach to the development of Field Programmable Gate Array (FPGA) projects, emphasizing the significance of the Register Transfer Level (RTL) design flow. The study is focused on the observation of critical phases of the design process, including the requirements definition, preliminary and detailed design, HDL-coding, synthesis, and process of modeling. The methods for integrating Continuous Integration/Continuous Deployment (CI/CD) practices into the RTL workflow are proposed. It allows improving and enhancing the automation and collective working among design teams as well as addressing time-to-market pressure. Future improvements are suggested, highlighting the necessity for advanced performance modeling tools and training programs for engineers to adapt to the ever-evolving landscape of FPGA technologies. The practical example of the application of the proposed method for the creation of service with continuous integration as part of the educational process of the VHDL language course is provided in detail.

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Method of Deployment of CI/CD Pipelines for RTL Design Flow Within FPGA Technology

  • 会议论文

  • 发表日期：

    2025年

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  • Vitaliy Kulanov,
  • Artem Perepelitsyn

摘要

This work presents a structured approach to the development of Field Programmable Gate Array (FPGA) projects, emphasizing the significance of the Register Transfer Level (RTL) design flow. The study is focused on the observation of critical phases of the design process, including the requirements definition, preliminary and detailed design, HDL-coding, synthesis, and process of modeling. The methods for integrating Continuous Integration/Continuous Deployment (CI/CD) practices into the RTL workflow are proposed. It allows improving and enhancing the automation and collective working among design teams as well as addressing time-to-market pressure. Future improvements are suggested, highlighting the necessity for advanced performance modeling tools and training programs for engineers to adapt to the ever-evolving landscape of FPGA technologies. The practical example of the application of the proposed method for the creation of service with continuous integration as part of the educational process of the VHDL language course is provided in detail.