Contemporary cryptographic algorithms present many challenges in hardware realizations because of their elaborate and irregular internal transformations resulting in massive and complex combinational circuits. In this paper we examined two hash functions: Keccak (the SHA-3 core) and BLAKE3, and evaluated their implementation efficiency in three currently viable generations of FPGA devices from AMD: 7 Series, UltraScale and UltraScale+. The analysis included the two ciphers realized in a standard iterative and pipelined architectures (to the total of 7 variants of cipher modules) and each one was evaluated with regard to size, speed and power losses in three above generations of Kintex FPGA devices. A consistent implementation methodology allowed to assess speed and power advantages brought by the new technologies but also identified specific aspects where such advantages were not so evident in this particular case of such demanding cryptographic algorithms.