This chapter introduces Caravel, an open-source SoC template, and explains its architecture, features, and installation process. It discusses the Chipignite program, the multi-Project Wafer sponsored by Google, and Efabless. The chapter also provides a practical guide on using Caravel, covering project directory structure, Verilog integration, GPIO configuration, and the RTL to GDSII flow. It concludes with a discussion on SoC integration, including user area pins, logic analyzer pins, GPIO pins, and provides an example of SoC integration using a 9999 counter.