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This chapter presents five practical projects to guide readers through the physical design flow using OpenLane. The projects include a Pseudo Random Generator, a Double Floating-Point Unit, an I2C Master/Slave module, AES-128 Encryption, and a basic RISC-V Processor. Each project is accompanied by configuration files, suggested experiments, and layout views, providing hands-on experience in optimizing system performance, power consumption, and area using OpenLane and open-source PDKs.

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Exploring OpenLane through Case Studies and Exercises

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  • 发表日期：

    2025年

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  • Susana Ortega Cisneros,
  • Emilio Isaac Baungarten Leon,
  • Pedro Mejia Alvarez

摘要

This chapter presents five practical projects to guide readers through the physical design flow using OpenLane. The projects include a Pseudo Random Generator, a Double Floating-Point Unit, an I2C Master/Slave module, AES-128 Encryption, and a basic RISC-V Processor. Each project is accompanied by configuration files, suggested experiments, and layout views, providing hands-on experience in optimizing system performance, power consumption, and area using OpenLane and open-source PDKs.