As one of the most sufficient approaches to exploit the software’s flexibility and the hardware’s efficiency, hardware/software co-design is widely used for accelerating computing systems from high performance to edge. This paper presents an efficient hardware/software co-design approach for developing secured edge computing systems with various data security approaches integrated into reconfigurable fabrics to support processing processor systems. With the proposed system, multiple security approaches can be selected and configured for the edge computing platforms for different purposes or adapted to other attacks. Multiple cryptography and security approaches have been tested with FPGA-based edge computing platforms, ranging from low-end to mid-end, to validate and estimate the framework. Our experimental results show that our edge computing system is more efficient than all other platforms while offering higher throughput than different processors.

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Hardware/Software Co-design for FPGA-Based Scalable Secure Edge Computing Platforms

  • Cuong Pham-Quoc

摘要

As one of the most sufficient approaches to exploit the software’s flexibility and the hardware’s efficiency, hardware/software co-design is widely used for accelerating computing systems from high performance to edge. This paper presents an efficient hardware/software co-design approach for developing secured edge computing systems with various data security approaches integrated into reconfigurable fabrics to support processing processor systems. With the proposed system, multiple security approaches can be selected and configured for the edge computing platforms for different purposes or adapted to other attacks. Multiple cryptography and security approaches have been tested with FPGA-based edge computing platforms, ranging from low-end to mid-end, to validate and estimate the framework. Our experimental results show that our edge computing system is more efficient than all other platforms while offering higher throughput than different processors.