Some CMOS technologies are extremely sensitive to plasma and process damage. These technologies include nonvolatile memories (NVMs), CMOS imagers, DRAM memories, metal-insulator-metal (MIM) capacitors, low-k dielectrics, and silicon-on-insulator (SOI). The fundamental physics of operation for these devices is responsible for their sensitivity. NVMs are susceptible because they require a charge to be trapped in a quantum well, making them a worst-case device for plasma damage, as plasma damage can force charge into the cell. CMOS imagers have been optimized to the point where they are sensitive to single photons. This sensitivity causes single-atom defects to interfere with device operation. DRAM memories have been scaled to the point where around 10,000 electrons are stored in the capacitor, which also makes them susceptible to single-atom defects. The MIM capacitors used in logic chips create large antennas and charge collection devices with a propensity for damage. The low-k dielectrics used in advanced CMOS are very sensitive to damage due to the fundamental properties that give them a low dielectric constant. SOI technology creates transistors in a small isolated silicon region where damage can be enhanced. Finfets are also susceptible to plasma and process damage as the fin dimensions approach atomic dimensions. This chapter covers the increased sensitivity of these technologies to plasma in process damage along with the underlying physical mechanisms.