Building on the performance of Transformers, Vision Transformers (ViTs) have recently been applied across a wide range of Computer Vision (CV) tasks, demonstrating superior results compared to traditional Convolutional Neural Networks (CNNs). However, the computational demands of ViTs remain a concern when deployed on edge devices, primarily due to the complexity of their various layers. Unlike CNNs, ViTs rely on multiple non-linear functions (Softmax, GELU, and LayerNorm) that significantly increase resource utilization, power consumption, and potentially induce high latency. Addressing the lack of FPGA-based implementations of non-linear functions, this work proposes a resource-efficient FPGA solution that achieves a 5.8 \(\times \) reduction in Look-Up Tables (LUTs) and a 12.3 \(\times \) reduction in registers, with a throughput of 32 processed elements per cycle and a clock frequency of 200 MHz, enabled by a reuse technique. Additionally, latency is reduced by 1.7 \(\times \) through a proposed three-stage pipelined architecture. The design is implemented on the Xilinx XCVU9P FPGA, leveraging decomposition techniques to resolve data dependencies and analyze similarities among the three non-linear functions in ViTs with the aim of combining them into a unified solution. A second-order mathematical approximation is employed to facilitate efficient synthesis of these non-linear functions on the FPGA.