It has been shown in the previous chapters that the Baliga short-circuit improvement concept, or the BaSIC topology, is an elegant solution to enhance the short-circuit withstand capability of power semiconductor devices. The concept makes use of a low voltage, non-linear element that is connected in series with the high voltage power device. The non-linear element must have a resistance that increases with increasing current until it limits the magnitude of the current. The non-linear element must have a low resistance at the on-state current level to minimize its impact on on-state and switching losses. This chapter discusses creating the BaSIC topology with the non-linear element integrated into the SiC power MOSFET structure. The non-linear element is formed with a lateral JFET structure located in series with the source region of the SiC power MOSFET. The design criteria for the integrated lateral JFET are analyzed.