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The chaotic systems described in the previous chapter can be simulated under a hardware description language, such as Verilog, and afterwards, the code can be synthesized into an FPGA. This chapter shows the Verilog descriptions of arithmetic and sequential blocks that are required to simulate chaotic maps and systems. Each block is detailed and is instantiated in the Verilog description of PRNGs based on chaotic maps and systems, as is shown in Chaps. 5 and 6 . This chapter ends with the Verilog description of the equations modeling a 2D Sprott map and the 3D Lorenz system.

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Verilog Descriptions of Digital Blocks to Synthesize Chaotic Maps and Systems

  • 章节

  • 发表日期：

    2025年

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  • Luis Gerardo de la Fraga,
  • José David Rodríguez-Muñoz,
  • Esteban Tlelo-Cuautle

摘要

The chaotic systems described in the previous chapter can be simulated under a hardware description language, such as Verilog, and afterwards, the code can be synthesized into an FPGA. This chapter shows the Verilog descriptions of arithmetic and sequential blocks that are required to simulate chaotic maps and systems. Each block is detailed and is instantiated in the Verilog description of PRNGs based on chaotic maps and systems, as is shown in Chaps. 5 and 6 . This chapter ends with the Verilog description of the equations modeling a 2D Sprott map and the 3D Lorenz system.