This chapter describes measures for modifying the present integrated circuit design methodology with the objective of countering electromigration. After introducing the overall design flow (Sect. 3.1), we explore how analog and digital designs are differentiated (Sect. 3.2). Understanding that knowledge of the currents flowing in interconnects is a fundamental requisite for an electromigration-aware design flow, we discuss in Sect. 3.3 the different types of currents encountered and show how sensible current values can be determined. Section 3.4 describes how robust current-density boundary values can be determined. Section 3.5 delves deeper into the fundamental procedures and critical aspects of current-density verification. Section 3.6 covers the novel approach of hydrostatic-stress verification applying physics-based modeling. In Sect. 3.7 we present options for dealing with problems identified by EM verification, using layout adjustment techniques. In the final Sect. 3.8, we put forward a number of farther-reaching measures for increasing EM boundary values, based on our assessment of current technological trends.