Instruments that have low consumption of electricity are vital in the contemporary technological era of tiny circuits. In the most recent technological equipment, memory is vital. As technology improved, it grew more complicated to sustain memories in terms of power utilization, stability, and speed. The sub-threshold current release adds considerably to the ultimate power dissipation due of scaling. In this research, a FinFET-depended self-controllable voltage level (SVL) method for low power leakage in Static Random-Access Memory (SRAM) cells is presented. Present paper covers the application of the Self-Controllable Voltage Level (SVL) method to minimize leakage power dissipation in an SRAM cell employing FinFETs. Reducing total power dissipation is achieved by employing SVL switch the fact that might work alternatively by dropping supply voltage to cell in idle state i.e. the top SVL or by boosting voltage of ground node linked to cell in idle state i.e. lower SVL or by a mixture of each. The FinFET depending SRAM cell using the SVL switch circuit can offers enhanced efficiency and reduced leakage power comparing to both regular SRAM cell and FinFET depending SRAM cell.